Time: 9:30 a.m，May 16
Location：Auditorium on 4th floor，School of Information Science and Engineering
Report：High-performance parallel processing and artificial intelligence systems based on functional memories
HiSIM family of compact integrated-device models for circuit simulation
Speaker：Hans Jürgen Mattausch
Abstract
This report gives an overview of important recent developments in the field of integrated circuits and outlines the related research activities at Hiroshima University. Two of these research activities with world-leading results will be explained in more detail.
a) High-performance parallel processing and artificial intelligence systems based on functional memories
The analysis of parallel information-processing systems reveals that the necessary data exchange between data-storage and data-processing parts of the system represents a major limiting factor for system performance. Therefore, in addition to the number-crunching power of the processing parts, innovations which substantially improve the bandwidth of the data exchange are essential for advances in the overall system capabilities. To be practically useful, such innovations must in particular carefully balance the bandwidth of the exchanged data amount against the required power dissipation. The main methods for achieving the data-exchange improvements will be reviewed, namely (a) an increased memory-access bandwidth by multi-porting of the memory and (b) a unification of memory and processing parts of the information-processing system as for example in associative memories. We will further present the recent advances in VLSI architectures for realizing higher data-exchange bandwidth by applying advanced nano-technologies and discuss practical implementation examples for parallel processors as well as for artificial intelligence systems with learning and recognition capability.
b) HiSIM family of compact integrated-device models for circuit simulation
HiSIM (Hiroshima university Starc Igfet Model) is the name of a surface-potential-based compact model for advanced sub-100nm scale MOSFET, which we are developing since more than a decade. HiSIM has evolved into one of the world’s leading MOSFET models for circuit simulation. The HiSIM2 model for bulk-MOSFETs is now widely applied and has been standardized in 2011 by the Compact Model Council (CMC) as a world-standard model of the semiconductor industry. More recently, the HiSIM approach of consistently potential-based modeling has been successfully extended to a broad range of integrated devices which have a MOSFET core in common, including SOI-MOSFET (HiSIM-SOI, HiSIM-SOTB), high-voltage MOSFET (HiSIM-HV), Insulated-Gate-Bipolar Transistor (HiSIM-IGBT), thin-film transistor (HiSIM-TFT), MOS varactor (HiSIM-VAR) and Double-Gate MOSFET (HiSIM-DG). HiSIM-HV became a CMC industry standard in 2008, HiSIM-SOI is in the final standardization stage and the standardization process for HiSIM-SOTB has started recently. The presentation will also give an outline of the surface-potential-based solutions applied in the HiSIM compact models and the methods for consistently potential-based extensions to derive compact models for all integrated devices which contain a MOSFET core.
Biography
Hans Jürgen Mattausch received the Dipl. Phys. Degree in Experimental Physics from the University of Dortmund, Dortmund, Germany, in 1977. His diploma research focused on 2-photon spectroscopy of excitons in covalent crystals. From 1978 to 1981 he was a researcher at the Max-Planck Institute for Solid-State Research in Stuttgart, Germany, investigating new Green’s function approaches for advancing the many-particle theory of covalent crystals, including Silicon and Diamond. For his research achievements he received the Dr. rer. nat. degree in Theoretical Physics from the University of Stuttgart, Stuttgart, Germany, in 1981.
In 1982 he joined the Research Laboratories of Siemens AG in Munich, Germany, where he was involved in the development of CMOS fabrication technologies, integrated static memories, RISC processors and broadband telecommunication circuits. From 1990 he led a research group on MOS-technology-based power-semiconductor devices, which included power-device design, modeling and power modules for packaging. In 1995 he joined the Siemens Semiconductor Group as Manager of the Department for Product Analysis and Improvement in the Chip Card IC Division.
Since 1996 he is with Hiroshima University, Higashi-Hiroshima, Japan, where he is presently a Professor at the Research Institute for Nanodevice and Bio Systems, and also the Graduate School of Advanced Sciences of Matter. In addition he serves as the Director of the HiSIM Research Center and as a member of Hiroshima University’s structural and educational reform committee.
Prof. Mattausch has published about 300 papers in refereed journals and conference proceedings. He is also the coauthor of a book on advanced surface-potential methods for compact MOSFET modeling and a book chapter on high-voltage MOSFET models for circuit simulation.
His main present research interests are in the fields of associative memories with fully-parallel nearest-distance search capabilities, architectures and VLSI implementation of practical systems with learning and recognition capabilities for mobile applications, nano-electronics applications in general, and compact modeling of integrated devices for circuit simulation. He is leading a number of research projects and industrial consortia for research-result applications in these research areas.
Prof. Mattausch is serving as TPC member of the European Solid-State Circuits Conference and the International Workshop on Compact Modeling. He is a senior member of IEEE and a member of IEICE.